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Master of Electrical Engineering Flashcards

7 cards from real ME or MEng Master of Engineering practice questions. Tap to flip, then mark Knew It or Still Learning — missed cards come back until you master them.

Read the first 7 Master of Electrical Engineering flashcards as text
  1. An op-amp integrator with R = 10 kΩ and C = 1 µF receives a 1 V DC step at t = 0. What is the output voltage after 10 ms (assuming ideal op-amp, starting from 0 V)?

    Answer: -1 V

    V_out = -(1/RC)∫V_in dt = -(1/0.01)·1·0.01 = -1 V.

  2. In the Z-transform, what is the Z-transform of the unit step sequence u[n]?

    Answer: 1/(1-z⁻¹), |z|>1

    The Z-transform of u[n] is Σz⁻ⁿ for n≥0, which converges to 1/(1-z⁻¹) for |z|>1.

  3. What is the primary advantage of using a synchronous rectifier over a diode rectifier in a DC-DC converter output stage?

    Answer: Lower conduction losses due to MOSFET R_DS(on) vs diode forward voltage

    MOSFET R_DS(on) voltage drop (mΩ range) is much smaller than a diode's ~0.5-1 V forward drop, significantly reducing conduction losses.

  4. Maxwell's equation ∇ × H = J + ∂D/∂t includes the displacement current term ∂D/∂t, which was added by Maxwell to:

    Answer: Ensure conservation of charge and allow electromagnetic wave propagation

    Maxwell added ∂D/∂t to make Ampère's law consistent with charge continuity (∇·J + ∂ρ/∂t = 0) and this addition predicts electromagnetic wave propagation.

  5. In a BJT common-emitter amplifier, the Early effect causes:

    Answer: A finite output resistance due to base-width modulation

    The Early effect (base-width modulation) causes I_C to increase slightly with V_CE, modeled as finite output resistance r_o = V_A/I_C.

  6. Which filter topology is best suited for implementing a maximally flat (Butterworth) low-pass response with minimal sensitivity to component tolerances?

    Answer: State-variable (biquad) topology

    The state-variable biquad topology independently controls Q and ω₀, giving low sensitivity to component variations for high-order Butterworth designs.

  7. In a power system, a 'bus impedance matrix' (Z_bus) is used to compute fault currents. For a bolted three-phase fault at bus k, the fault current is:

    Answer: V_k(pre-fault) / Z_kk

    For a bolted fault at bus k, I_fault = V_k(pre-fault) / Z_kk, where Z_kk is the Thevenin impedance seen at bus k.