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CPU Architecture & Instruction Sets Flashcards

7 cards from real CCP practice questions. Tap to flip, then mark Knew It or Still Learning — missed cards come back until you master them.

Read the first 7 CPU Architecture & Instruction Sets flashcards as text

  1. What is the role of the 'stack pointer' register in CPU operation?

    Answer: Points to the top of the call stack, tracking the current stack frame boundary

    The stack pointer (SP) register maintains the address of the top of the runtime stack, automatically updated as data is pushed onto or popped from the stack.

  2. In x86-64 architecture, how many general-purpose registers are available compared to the original 8086?

    Answer: 16 general-purpose registers (rax through r15)

    x86-64 extended the original 8 general-purpose registers to 64 bits and added 8 new registers (r8–r15), giving 16 total general-purpose registers.

  3. What is 'cache coherency' and why is it critical in multi-core systems?

    Answer: Ensuring all cores see a consistent view of shared memory despite having private caches

    Cache coherency ensures that when multiple cores have cached copies of the same memory location, all cores observe a consistent and up-to-date value, preventing stale data errors.

  4. What does a 'context switch' involve at the CPU hardware level?

    Answer: Saving and restoring the CPU register state (program counter, registers, flags) to switch between processes

    A context switch saves the current process's CPU state (registers, program counter, flags) to memory and loads a previously saved state for the next process to run.

  5. What is the significance of the 'word size' of a CPU architecture?

    Answer: It defines the natural data unit size, typically matching register width and affecting addressable memory

    The word size defines the native data unit of the processor, matching general register width and typically determining the maximum directly addressable memory (e.g., 32-bit allows 4 GB addressing).

  6. Which technique allows a single physical processor to appear as multiple logical processors to the operating system?

    Answer: Simultaneous Multithreading (SMT) / Hyper-Threading

    Simultaneous Multithreading (SMT), branded as Hyper-Threading by Intel, duplicates architectural state to run multiple hardware threads on one physical core, appearing as multiple logical CPUs.

  7. What is the purpose of the 'prefetch' mechanism in modern CPUs?

    Answer: To predict and load likely-needed data or instructions into cache before they are explicitly requested

    Prefetching proactively loads data or instructions into cache based on access pattern predictions, reducing cache miss latency when the CPU does request that data.